SHRI G. S. INSTITUTE OF TECHNOLOGY & SCIENCE, INDORE

The department has state-of-art equipment like Vector Network Analyser (VNA), RF Spectrum Analyzer and RF Synthesizer for testing of High frequency RF circuits in range of 12-15GHz. 
Department has the expertise in field of PLC, SCADA and DCS and also provides consultancy and testing-calibration services in this field.
The department has generated revenue of Rs. 1,01,775/- (Rs. One Lakh One Thousand Seven Hundred Seventy Five Only) during the FY 2023-24 against the consultancy servies give to Nagar Nigam Dewas in SCADA installation and operations.<Click Here>

1.

• AICTE Sponsored One Week Online STTP on “Mixed Signal & Radio Frequency VLSI Design” in 3 Phase Download File | IMG | 12KB |
• STTP-1 during 23rd to 28th Nov 2020 Download File | IMG | 32KB |
• STTP-2 during 07th to 12th Dec 2020 Download File | IMG | 54KB |
• STTP-3 during 12th to 19th Dec 2020 Download File | IMG | 24KB |

2. Industrial Visit of UG Students to BHEL, Bhopal on
3. AICTE Sponsored One week STTP onDesign & Development of System on chipusing Low Power VLSI” from 25/11/2019 to 30/11/2019
4.

• Alumni Meet in the department on 24/12/2018 Download File | IMG | 54KB |
• Industrial Visit of UG Students on 19/12/2018 Download File | IMG | 33KB |
• Industrial Visit of PG Students on 18/12/2018 Download File | IMG | 34KB |
• Teacher's Day Celebration Download File | IMG | 89KB |

5.

• All VLSI EDA tools licenses under SMDP Chip to System Design Project are received and installed.
• A MOU was signed by Director SGSITS, Indore, Director, CEERI Pilani and MIT, Government of India for Chip to System Design project running in E & I department.

6.Achievement award Batch 2014-18 Download File | IMG | 58KB |

7. STTP workshop Recent Trends in VLSI Design (9 to 13 April 2018) Download File | IMG | 68KB |

8. ISTE -STTP (2 Week) on CMOS, Mixed Signal & Radio Frequency VLSI Design (30th Jan 2017 to 4th Feb 2017)

9. Vendor Training Program on Mentor Graphics (26th to 29th December 2016)

10. STC on Analog & Mixed signals System Design ( March 23-27 2015)

1) Chip to Startup Project (2022-2027) - Ongoing
This project was launched to train 85000 number of specialized man power over a period of 5 year in area of VLSI & Embedded System Design. Department recieved the grant under various heads like capital equipment, training, consumable etc. The cluster under IIT Indore consisting of SGSITS Indore, IET-DAVV Indore, IIT Jammu, ABV-IIITM Gwalior has signed an MOU with end user & collaborator "Shree Pacetronix Ltd" Pithampur to design & fabricate iPACE-CHIP , a Pacemaker.
Funding Agency: Ministry of Electronics & Information Technology (Meity) Goverment of India.
Chief Investigator: Dr P. P Bansod, Professor
Co-chief Investigator: Dr. Rajesh Khatri,Associate Professor, Dr. R.C Gujar, Associate Professor 
Grant Received: Rs.96 Lacs
Status: Ongoing 
Outcome(Expected): A Pacemaker (iPACE-CHIP) chip is expected to be tape-out & be commercialize as end-product by "Shree Pacetronix Ltd" Pithampur,Indore. This end-product will be designed under cluster of IIT Indore, SGSITS Indore, IET-DAVV Indore,  IIT Jammu, ABV-IIITM Gwalior.

2) SMDP-C2SD (2015-2021) -Completed
Department has received the letter from Department of Electronics and Information Technology (DeitY), Govt. of India regarding the launch of Special Man-Power Development Programme (SMDP-III) also called as Chip to System Design (C2SD) project. Under the C2SD project, a total of 60 Institute are participating. These Institutes which includes all IITs, NITs are divided into three categories called as Resource centres, Participating Institutes and New Participating Institutes. There are 10 Resource Centres, 30 Participating Institutes and 20 New Participating Institutes. Each participating institute New Participating Institute is attached to resource centre. Our institute is Participating Institute and attached to IIT Bombay. The Director of the institute has signed an MOU with the Department of Electronics and Information Technology (Deity), Govt. of India as per the norms for participating Institutes. The department will receive the grant from Deity for setting up VLSI-EDA lab, books, consumables, contingency, travel grant for presenting paper, attending workshops, conference and seminars. The role and responsibility of the department is to provide research facility to the student and to design and fabricate ICs of their research work under India Chip programme funded by Deity. It is also expected to start a Networked Ph.D. programme under this project. The other activities which includes under this project are to design ASCIs, Knowledge exchange programme.
Funding Agency: Ministry of Electronics & Information Technology (Meity) Goverment of India.
Chief Investigator: Dr. D.K Mishra, Professor
Co-chief Investigator: Dr. Rajesh Khatri, Associate Professor
Grant Recieved: Rs.1 crore 66 Lacs
Status: Completed
Outcome: 1) An SOC enlitted " A Versatile Physiological Signal Monitoring System for Healthcare" was tape-out as a cluster project under IIT Bombay, SVNIT Surat, IIT Gandhinagar & IIT Indore.
2) An ASIC enlitted "A 2.4 GHz Direct Conversion RF Reciever Front" was designed in UMC 180 nm 1P6M Technology & Simulated.  

3) SMDP-II (2005-2013) -Completed
This research project was funded by Ministry of Information and Communication Technology, Govt. of India. The aim of project was to generate man power in VLSI. Ministry provided funds for various activities like purchasing books, equipments, attending international/national conferences/workshop. Department have designed and fabricated an integrated chip of "A Two stage CMOS OP-AMP" under this project fund.
Funding Agency: Ministry of Electronics & Information Technology (Meity) Govement of India.
Chief Investigator: Dr. D.K Mishra, Professor
Co-chief Investigator: Mr. Pramod K. Jain , Associate Professor
Grant Recieved: Rs.55 Lacs
Status: Completed
Outcome: A chip enlitted "A Two Stage CMOS OP-AMP" was tape-out using UMC 180 nm 1P6M Technology.

4) R & D Project- Completed

S.No.	Name of CO-Principal Investigator	Title of Project	Duration	Funding Agency	Amount (Rs.)
1	Dr. P. P Bansod	Future Extraction for Pathological Image Analysis	2019-2021	AICTE	Rs. 4,79,500/-

5) R & D Project - Completed

S.No.	Name of Co-Principal Investigator	Title of Project	Duration	Funding Agency	Amount (Rs.)
1	Dr. Gireesh G. Soni	Investigation of Performance Enhancement sch.For Rain Interrupted Optical Wireless Links	June 2019-2021	TEQIP/ NPIU	18.9 Lacs

Department Library:
Department has an excellent library containing 440 books with approximately 150 titles. These books includes mainly the reference books for research purpose. Library covers an area of 690 sq.feet. The library was established under the funds received from SMDP-I and SMDP-II projects funded by DeitY, Govt. of  India.

Research Lab:

The Department has well equipped research lab of 240 sq.feet area with state of art EDA tools like CADENCE, Mentor-Graphics, Synopsys. The Lab also has test and measuring instruments including Agilent 64- channel Logic Analyzer, Xilinx FPGA logic probe, Agilent 20MHz Arbitrary Waveform Generator, Agilent Mixed Signal Oscilloscope, Tektronics 100MHz DSO, Programmable Power Supply,Virtex-2Pro FPGA Development Boards, Spartan-3E FPGA Development Boards. In addition to these research activities department has also procured 3GHz spectrum analyser, 3GHz RF Synthesizer and 8GHz Vector Analyser under World Bank project TEQIP-II.

Lab : Sensors and Transducers

The lab covers 690 sq. feet area and includes equipments:Temperature Measuring Workbench, Level Measuring Workbench, Strain Gauge Trainer, LVTD trainer, Wheatstone Bridge, RTD Trainer Kit, Thermister trainer kit, Multimeters, CROs.


Lab : Basic Electronics Devices
The lab covers an area of  978 sq. feet and include equipments: Digital Oscilloscopes, Function generators, Power Supplies, Diode characteristics trainer kit, Transistor characteristics trainer kit, Regulated single and Dual power supply, Digital Multimeters.

Lab : Process control
The lab encloses a total area of 810 sq. feets. Equipments in this laboratory are procured under World Bank project (TEQIP-II) and installed successfully. Equipments: Rotameter, flapper nozzle, flow control system (PID), level control system (PID), PLC controllers, Cascade control system, lift Simulator model, Heat Exchanger, Bottle filling plant model, P, PI, PD, PID trainer kits.

Lab : Fibre Optics and Photonics
The lab encloses total area of 720 sq.feet. Equipments: Optical power meters, Laser sources, GHz modulator, Tektronix AWG (AFG31000 series), Optical trainer kits (ST2501, ST2502, ST 2506, ST 2506A),  Fibre optic and digital communication experimental benchmark, Multiplexer/Demultiplexer trainer kit, Encoder/Decoder trainer kit.

Lab : Network Analysis and Synthesis
The lab covers an area of 690 sq.feet. Equipments : Trainer Boards: Thevenin's theorem, Norton's theorem, Superposition theorem, Maximum power transfer theorem, Reciprocity theorem, OPAMP 1st order LPF, Butterworth LPF/HPF, 4th order band pass filter, CRO, multimeters.

Lab :Analog Electronics
Equipments :Advance Analog Lab Workstation with solderless Bread Board,Diode Characterstics (PN Junction, Zener, LED, Tunnel, Schottky), (NPN & PNP) Transistor Characterstics of CB, CC and CE, FET Characterstics, Rectifier Circuit Board, Diode based Clamper & Clipper board, Zener Voltage Regulation (Line & Load), Transistor series & Shunt voltage regulation Board, Voltage Multiplier & Voltage Follower Board, Peak detector Module Board, V-I and I-V Converter, F-V and V-F Converter, RC Coupled Amplifier board (with and without Feedback), Transformer Coupled Amplifier board, Direct Coupled Amplifier board, FET Amplifier, CE,CB & CC configuration Amplifier, Cascode and cascade Amplifier, Differential Amplifier (Transistorized), DC Amplifier, VCO, Schmit Trigger & Comparator, Operational Amplifier(Inverting/Non Inverting/Differential) ,Operational Amplifier(Adder/Scalar),Window Comparator, Op-amp as Log/Antilog amplifier, Automatic gain controller, Kelvin's Double Bridge, Sample & Hold Circuit, Sinusoidal Study State Response Of Parallel RLC Circuit Trainer, Sinusoidal Study State Response Of SERIES RLC Circuit Trainer, Two port ladder network trainer, T & Pie network Trainer, Transient analysis of RC/RL circuit, Transient analysis of RLC circuit, Tellegen's Theorem, Norton's Theorem, RLC Resonance Trainer, Tchebyshev Filter (LPF and HPF), Notch Filter (active + passive), Passive Attenuator (T & Pi), K-Derived filter, M-Derived filter, M-Derived band pass and band reject filter, Filter/Noise & audio Amplifier Kit, Active Filters (LPF+HPF), Active Band Pass Filter, Two Port network parameters (h,y,z),Temperature Transducer (RTD & IC based), Dual channel Analog Signal Analyzer, Phase shift Oscillator, Wien Bridge Oscillator, Colpitts & Hartley Oscillator, Clap Oscillator, phase shift oscillator (Transistorised), maxwell's Bridge, Desauty Bridge, Schearing bridge, Class A, Class B (Push Pull) & Class C Tuned Amplifier, Crystal Oscillator, Sine and Cosine Oscillator (OP-AMP based).

Lab :Digital Electronics

Equipments :AdvanceDigital Lab Workstation with solderless Bread Board,Basic Logic Gate Experimental board, Universal gate Nand/NOR gate, Ex-OR gate implementation & application, experimentation with Demorgan's Therorem, Code Conversion( Binary to Gray & gray to binary), code conversion (BCD to excess-3 code), Binary Adder/Substractor, Encoder-Decoder, Multiplexer-Demultiplexer, Flip-flops(RS,JK,D & T), shift registers(4bit SIPO), 4 bit synchronous binary counter, 4 bit binary ripple counter (up-down), BCD to 7 segment Decoder, Digital to analog concerter (R-2R ladder), 3-digit event counter, Johnson Counter, 4 bit parallel adder, 4-bit magnitude comparator, 8 bit Ring counter, parity generator & Checker, Modulo N Programmable counter, Multivibrator Trainer module(Astable,Bistable & Monostable), 8 channel Digital Signal Analyser, Event Counter, Keyboard Encoder, Transfer Characterstics TTL & CMOS inverter.

Lab : Microprocessor and Microcontroller
Equipments : 8085 microprocessor boards, Peripheral devices, 8051 microcontroller boards, Logic Analyser, 8086 microprocessor kits and peripherals.

Lab : Electronic Workshop Product Design
Equipments : PCB design facility, Drilling machine, Soldering irons and stands, Soldering tools and kits.

Lab : Fundamentals of Measurement
The lab encloses an area of 690 sq. feet. Equipments : Hay's bridge, Maxwell's bridge, Desauty bridge, Weins bridge oscillator, measurement of Temperature using Thermister trainer, LVDT trainers, strain gauge, displacement transducers using inductive transducers.

Lab : Advanced VLSI Design-1 Lab
This lab was set up under Special Man-Power Development Programme (SMDP-I) funded by Ministry of Information and Communication Technology, Government of India. Students of UG and PG use this lab for carrying out practical on Xilinx and Tanner EDA tools. Equipments : Software: Xilinx EDA tool Tanner EDA tool Hardware: CPLD boards FPGA (Spartan and Virtex) boards. The total area enclose is about 690 sq. feet. 

Lab : Advanced VLSI Design-2 Lab
This lab was set up under Special Man-power Development Programme (SMDP-II) funded by Ministry of Information and Communication Technology, Govt. of India. This lab is Start of art lab for research in VLSI field. M. Tech. and Ph. D. students use this lab for carrying out research work. Equipments : EDA tools: Cadence, Mentor Graphics, Synopsys. The total area of lab is 720 sq. feet.

SEMINAR HALL
Department has well maintained, air conditioned seminar hall 'SPANDAN HALL' with capacity of 70. It incorporates good quality of audio visual setup and wifi enabled. 

CONFERENCE ROOM 
Department has an excellent library containing 440 books with approximately 150 titles. These books includes mainly the reference books for research purpose. The library was established under the funds received from SMDP-I and SMDP-II projects funded by DeitY, Govt. of India.

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